Before using the Verigy 93K tester, ensure you have read and understood the following safety precautions:
Uses a modern, object-oriented setup based on C++ and Java. Key Workspaces Setup Window: Where you define pins, voltages, and timing. verigy 93k tester manual
Detailed instructions for SmarTest 7 (Eclipse-based) or SmarTest 8 , including test flow creation, test method coding in C++, and debugging. Before using the Verigy 93K tester, ensure you
Import or manually code the relationship between your DUT package pins and the tester channels. Group pins into functional categories (e.g., ALL_DIGITAL , POWER_PINS , JTAG_GROUP ) to streamline parameter assignments later. Step 2: Establish Levels and Power Import or manually code the relationship between your
Central to the manual is the SmarTest software overview , which guides users through the Eclipse-based integrated development environment (IDE).
) and timing (Cycle Period) boundaries to determine if the device is failing due to marginal timing or insufficient voltage guard bands. 5. Best Practices for Production Deployment